Complementary Metal Oxide Semiconductors (CMOS) technology, having n-channel and p-channel enhancement mode devices fabricated compatibly on a silicon chip and connected into push-pull complementary digital circuits has now become the dominant candidate for very large scale integrated (VLSI) circuits. These circuits offer low quiescent power dissipation and can be used in high areal density on a chip. However, it is desirable to decrease the internal delay and provide higher speeds.
The present invention is directed to an improved CMOS driver circuit having a small internal delay for large loads. The present invention is directed to a bootstrapped driver circuit that provides with a typical 1.25 um technology, a total internal delay of less than 1 nanosecond for a driver with 100 ohms compatible output impedance. Furthermore, if complementary signal outputs are available, the internal delay will be even less. The circuit is highly suitable for low temperature operating circuits, clock buffers and high-speed digital applications involving high impedance transmission lines.